SafeTI: A Hardware Traffic Injector for Complex MPSoC Platform Validation and Characterization

Jan 1, 2024·
F. Fuentes
Dr. Sergi Alcaide Portet
Dr. Sergi Alcaide Portet
,
R. Casanova
,
J. Abella
· 0 min read
Type
Publication
Association for Computing Machinery
publications
Multicore & MPSoC Timing Interference & Validation
Authors
F. Fuentes
Dr. Sergi Alcaide Portet
Authors
Dr. Sergi Alcaide Portet (he/him)
Postdoc | Research Engineer
Sergi Alcaide is a PostDoc in the HADES group, within the HPES Lab @ BSC (Barcelona Supercomputing Center)
Authors
R. Casanova
Authors
J. Abella