SMARTY

SMARTY is an active European project funded under the Chips Joint Undertaking (Chips JU) aimed at building smart, dependable, and high-performance computing architectures for next-generation safety-critical applications.

🎯 Objectives & Scope

Modern critical systems (autonomous driving, avionics, industrial robotics) require massive compute power alongside strict functional safety (ISO 26262 ASIL-D, DO-254). SMARTY bridges this gap through intelligent hardware/software co-design.

💡 Key Research Focus

• Hardware-Enforced Isolation: Advanced hardware partitioning mechanisms ensuring zero-interference between critical real-time tasks and AI acceleration workloads.
• RISC-V Safety Extensions: Extending open-source RISC-V cores with custom safety-monitoring hardware units.
• Smart Contention Control: Machine-learning-assisted dynamic bandwidth allocation to mitigate interconnect contention in complex SoCs.

🏛️ Target Domains

• Autonomous Automotive Systems
• Next-Gen Avionics & Aerospace Flight Computers
• Smart Industrial Automation