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    • On-Chip Programmable Traffic Injection for Flexible Cache Coherence Validation
    • Application of Tiny RISC-V: Invited paper
    • Hardware-Enforced Throughput Quotas for Mitigating Accelerator Interference in Mixed-Criticality SoCs
    • Introduction to Post Quantum Cryptography for Resource Constrained Systems
    • Expanding SafeSU capabilities by leveraging security frameworks for contention monitoring in complex SoCs
    • Flexible Software-Only Diverse Redundancy on COTS GPUs for Safety-Related Kernels
    • On-chip Traffic Injection to Counteract Timing Side-Channel Attacks
    • SafeTI: A Hardware Traffic Injector for Complex MPSoC Platform Validation and Characterization
    • Enhancing Safety with RISC-V-based SPIDER Autonomous Robot: A Use-Case from the ECSEL FRACTAL Project
    • A Software-Only Approach to Enable Diverse Redundancy on Intel GPUs for Safety-Related Kernels
    • Analysis of Kernel Redundancy for Soft Error Mitigation on Embedded GPUs
    • Black-Box IP Validation with the SafeTI Traffic Injector: A Success Story
    • Envisioning a Safety Island to Enable HPC Devices in Safety-Critical Domains
    • Hardware/software solutions to enable the use of high-performance processors in the most stringent safety-critical systems
    • NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips
    • SafeLS: An Open Source Implementation of a Lockstep NOEL-V RISC-V Core
    • SafeLS: Toward Building a Lockstep NOEL-V Core
    • SafeTI Traffic Injector Enhancement for Effective Interference Testing in Critical Real-Time Systems
    • Unboxing the Sand: on Deploying Safety Measures in the Programmable Logic of COTS MPSoCs
    • Achieving Diverse Redundancy for GPU Kernels
    • De-RISC: A Complete RISC-V Based Space-Grade Platform
    • End-to-End QoS for the Open Source Safety-Relevant RISC-V SELENE Platform
    • SafeDE: A Low-Cost Hardware Solution to Enforce Diverse Redundancy in Multicores
    • SafeDM: a Hardware Diversity Monitor for Redundant Execution on Non-Lockstepped Cores
    • SafeDX: Standalone Modules Providing Diverse Redundancy for~Safety-Critical Applications
    • SafeSoftDR: A Library to Enable Software-Based Diverse Redundancy for Safety-Critical Tasks
    • SafeSU-2: a Safe Statistics Unit for Space MPSoCs
    • SafeX: Open Source Hardware and Software Components for Safety-Critical Systems
    • SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping
    • SafeTI: a Hardware Traffic Injector for MPSoC Functional and Timing Validation
    • SafeSU: an Extended Statistics Unit for Multicore Timing Interference
    • Security, Reliability and Test Aspects of the RISC-V Ecosystem
    • GPU4S: Major Project Outcomes, Lessons Learnt and Way Forward
    • GPU4S: Embedded GPUs in space - Latest project updates
    • Software-only based Diverse Redundancy for ASIL-D Automotive Applications on Embedded HPC Platforms
    • Software-only triple diverse redundancy on GPUs for autonomous driving platforms
    • Software-only Diverse Redundancy on GPUs for Autonomous Driving Platforms
    • High-Integrity GPU Designs for Critical Real-Time Automotive Systems
    • Safety-Related Challenges and Opportunities for GPUs in the Automotive Domain
    • DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis
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