Sergi Alcaide Portet
Open Menu
Close Menu
Home
Publications
Track Record
Projects
P. Benedicte
Programmable Logic
Unboxing the Sand: on Deploying Safety Measures in the Programmable Logic of COTS MPSoCs
Dr. Sergi Alcaide Portet
•
Jun 1, 2022
•
1 min read
Read more
Safety-Critical Systems
SafeX: Open Source Hardware and Software Components for Safety-Critical Systems
Dr. Sergi Alcaide Portet
•
Jan 1, 2022
•
1 min read
Read more
Space Applications
SafeSU-2: a Safe Statistics Unit for Space MPSoCs
g.-cabo
•
Jan 1, 2022
•
1 min read
Read more
Diverse Redundancy
SafeSoftDR: A Library to Enable Software-Based Diverse Redundancy for Safety-Critical Tasks
f.-mazzocchetti
•
Jan 1, 2022
•
1 min read
Read more
Diverse Redundancy
SafeDX: Standalone Modules Providing Diverse Redundancy for~Safety-Critical Applications
r.-canal
•
Jan 1, 2022
•
1 min read
Read more
Diverse Redundancy
SafeDM: a Hardware Diversity Monitor for Redundant Execution on Non-Lockstepped Cores
f.-bas
•
Jan 1, 2022
•
1 min read
Read more
Diverse Redundancy
SafeDE: A Low-Cost Hardware Solution to Enforce Diverse Redundancy in Multicores
f.-bas
•
Jan 1, 2022
•
1 min read
Read more
RISC-V
End-to-End QoS for the Open Source Safety-Relevant RISC-V SELENE Platform
p.-andreu
•
Jan 1, 2022
•
1 min read
Read more
RISC-V
De-RISC: A Complete RISC-V Based Space-Grade Platform
n.-wessman
•
Jan 1, 2022
•
1 min read
Read more
Multicore & MPSoC
SafeTI: a Hardware Traffic Injector for MPSoC Functional and Timing Validation
o.-sala
•
Jun 1, 2021
•
1 min read
Read more