Dr. Sergi Alcaide Portet
Introduction to Post Quantum Cryptography for Resource Constrained Systems
Hardware-Enforced Throughput Quotas for Mitigating Accelerator Interference in Mixed-Criticality SoCs
As open-source Systems-on-Chip (SoCs) scale in complexity, mitigating timing interference across shared resources remains a critical challenge for mixed-criticality applications. …
Application of Tiny RISC-V: Invited paper
Specialized tiny RISC-V cores, typically coupled with scratchpad memories, offer opportunities to manage application-specific units efficiently and autonomously. In general, safety …
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On-chip Traffic Injection to Counteract Timing Side-Channel Attacks
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Enhancing Safety with RISC-V-based SPIDER Autonomous Robot: A Use-Case from the ECSEL FRACTAL Project
The SPIDER use case of the ECSEL FRACTAL project demonstrates the safety capabilities developed in the project on a RISC-V platform. The use case demonstrates the integration of a …
SafeLS: An Open Source Implementation of a Lockstep NOEL-V RISC-V Core
Hardware/software solutions to enable the use of high-performance processors in the most stringent safety-critical systems
Analysis of Kernel Redundancy for Soft Error Mitigation on Embedded GPUs
Unboxing the Sand: on Deploying Safety Measures in the Programmable Logic of COTS MPSoCs
SafeX: Open Source Hardware and Software Components for Safety-Critical Systems
End-to-End QoS for the Open Source Safety-Relevant RISC-V SELENE Platform
Security, Reliability and Test Aspects of the RISC-V Ecosystem
Software-only triple diverse redundancy on GPUs for autonomous driving platforms
Software-only based Diverse Redundancy for ASIL-D Automotive Applications on Embedded HPC Platforms
Software-only Diverse Redundancy on GPUs for Autonomous Driving Platforms
High-Integrity GPU Designs for Critical Real-Time Automotive Systems
Safety-Related Challenges and Opportunities for GPUs in the Automotive Domain
DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis
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